In conventional fan-out wafer level packaging (FOWLP), a device (e.g., die, wafer, etc.) is placed on a carrier. Then a mold compound—either granule or liquid—is applied and compression molded. A conventional compression mold packaged device 100 is illustrated in FIG. 1A. The conventional device 100 includes a die 110 encapsulated by a mold compound 150. The device 100 also includes a plurality of metal layers 120 electrically coupling the die 110 with a plurality of solder balls 130. The metal layers 120 are also referred to as redistribution layers (RDL). A polymer dielectric passivation layer 140 is in between the die 110 and the plurality of metal layers 120 other than those portions used to electrically couple the die 110 with the plurality of metal layers 120.
So as to minimize clutter, elements such as under bump metallization (UBM) layers and bonding pads are not specifically illustrated. Also while not shown, the device 100 can be attached to a printed circuit board (PCB) through the plurality of solder balls 130, and the area between the device 100 and the PCB may be filled with adhesive such as filled epoxy also known as an underfill.
In the conventional FOWLP, there can be a step between the die and the surrounding compression molded encapsulant. The hashed circular area of FIG. 1A is magnified in FIG. 1B which shows the step between the bottom surface of the die (active side of die) 110 and the mold compound 150. The step can be as much as 5 μm or greater. The step can act as a stress concentrator (e.g., mechanical and/or thermal stresses), and thus can cause reliability issues to develop.
To address such problems, a 10-15 μm thick polymer layer can be used for passivation and planarized prior to plating the RDLs. Unfortunately, the thick polymer layer can cause warpage issues. There can also be issues related to reliability depending on the type of polymer dielectric passivation used. In addition, the thick polymer layer restricts the size of vias such as the via 145. Typically, the via size to polymer thickness ratio is ≧1. For example, a 14 μm film will have a via size of ≧14 μm.